Product overview
In the semiconductor production line, the Coating and Developing System is an indispensable key equipment, which is essential from the initial chip prototype to the formation of circuit patterns. After receiving the substrate, the Coating and Developing System first activates the high-speed rotation system. The photoresist spreads evenly with the precisely speed-controlled turntable, and even the millimeter-level edges can be coated smoothly-this step is the most test of precision, and a slight deviation will affect the subsequent chip performance.
The coated photoresist still needs to be cured. The Coating and Developing System's built-in heating plate will gradually heat up to make the adhesive layer firmly adhere to the substrate. After the lithography machine completes the exposure, it immediately takes over the developing process. By controlling the temperature and spraying intensity of the developer, it removes the unexposed excess adhesive layer, and the basic pattern of the integrated circuit is thus revealed.
In practical use, the Coating and Developing System's line width precision is particularly reliable, and it is suitable for various chip manufacturing processes. Moreover, the production capacity, which is most valued in the production line, is also excellent. It can process a large number of substrates per hour, while having low memory usage. It can work continuously for more than ten hours stably, and can fully keep up with the mass production rhythm.
Please contact our sales representatives to obtain the most suitable solution for you.
Advantages
High-precision chip manufacturing relies on precision spin coating technique, which guarantees consistent photoresist application and significantly lessens subsequent processing difficulties.
Complex problems like timing alignment and wafer transfer between devices are easily handled by special collaborative control methods.
Significant advancements in temperature control accuracy, homogeneity at the nanoscale level, and defect control have resulted in yield rates that above 90%.
The specialized spin coating solution is appropriate for all substrate types and may be applied to wafers with different thicknesses and unusual shapes.
Uniformity and efficiency are balanced by optimized spin speed and coating pressure, which greatly lowers yield losses and makes it easier to manufacture chips with irregular shapes.
Parameters
①DS 100

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DS 100 Device Overview |
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Device size (mm) |
2825*1080*1600 2C2D+Interface |
Wafer size |
2-6 inch wafers (50mm-100mm) |
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WPH |
≤160pcs |
MTTR |
≤4hrs |
|
Merit Rating |
Class1@0.1μm Wafer transfer area only |
MTBF |
≥1000hrs |
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Applicable process |
I line, PI, PR |
MTBM |
>six months |
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Wafer contact material |
PEEK/PTFE/CERAMICS |
Wafer breakage rate |
≤0.01% |
|
Cassettes |
SMIF; OPEN CASSETTE |
UP TIME |
≥95% |
|
Application area |
Compound semiconductor, integrated circuit, power device, scientific research project, optical device, IC, IGBT, MOSFET, MEMS, warping wafer, square wafer |
Software runtime environment |
Windows 10 or later operating system |
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Minimum line width |
350nm |
Cold and hot plate module |
(HP; CPL; ADH; HHP)≤14PCS |
②DS 200

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DS 200 Device Overview |
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Device size (mm) |
1660*1510*2000 (Tower Design) |
Wafer size |
2-6 inch wafers (50mm-100mm) |
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WPH |
≤150pcs |
MTTR |
≤4hrs |
|
Merit Rating |
Class1@0.1μm Wafer transfer area only |
MTBF |
≥1000hrs |
|
Applicable process |
I line, PI, PR |
MTBM |
>six months |
|
Wafer contact material |
PEEK/PTFE/CERAMICS |
Wafer breakage rate |
≤0.01% |
|
Cassettes |
SMIF; OPEN CASSETTE |
UP TIME |
≥95% |
|
Application area |
Compound semiconductor, LED, optical device, IC, IGBT, MOSFET, MEMS, warping wafer, square wafer |
Software runtime environment |
Windows 10 or later operating system |
|
Minimum line width |
350nm |
Cold and hot plate module |
(HP; CPL; ADH; HHP)≤14PCS |
③DS 300

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DS300 Device Overview |
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Device size (mm) |
2850*1360*2200 2C2D+Interface |
Wafer size |
4-8 inch wafers (100mm- 200mm) |
|
WPH |
≤160pcs |
MTTR |
≤4hrs |
|
Merit Rating |
Class1@0.1μm Wafer transfer area only |
MTBF |
≥1000hrs |
|
Applicable process |
I line, PI, PR |
MTBM |
>six months |
|
Wafer contact material |
ASML, Nikon, CANON, CECT, SMCC |
Wafer breakage rate |
≤0.01% |
|
Cassettes |
SMIF; OPEN CASSETTE |
UP TIME |
≥95% |
|
Application area |
Compound semiconductor, integrated circuit, power device, memory chip, scientific research project, optical device, IC, IGBT, MOSFET, MEMS, warping wafer, square wafer |
Software runtime environment |
Windows 10 or later operating system |
|
Minimum line width |
180nm |
Cold and hot plate module |
(HP; CPL; AD; DHP)≤24PCS |
④DS 400

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DS 400 Device Overview |
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Device size (mm) |
3975*1655*2550 4C4D+Interface |
Wafer size |
6-8 inch wafers(150mm- 200mm) |
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WPH |
≤180pcs |
MTTR |
≤4hrs |
|
Merit Rating |
Class1@0.1μm Wafer transfer area only |
MTBF |
≥1000hrs |
|
Applicable process |
I line, KrF, ArF, PI, PR, Package |
MTBM |
>six months |
|
Wafer contact material |
ASML, Nikon, CANON, CECT, SMCC |
Wafer breakage rate |
≤0.01% |
|
Cassettes |
FOUP; SMIF; OPEN CASSETTE |
UP TIME |
≥95% |
|
Application area |
Compound semiconductor, integrated circuit, power device, memory chip, scientific research project, IC, IGBT, MOSFET, MEMS, warping wafer, square wafer |
Software runtime environment |
Windows 10 or later operating system |
|
Minimum line width |
90nm |
Cold and hot plate module |
(LHP; CPL; ADH; HCH; PHP ; HCP)≤38PCS |
⑤DS 500

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DS 500 Device Overview |
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Device size (mm) |
5370*2100*2650 4C4D+Interface |
Wafer size |
8- 12 inch wafers(200mm- 300mm) |
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WPH |
≤200pcs |
MTTR |
≤4hrs |
|
Merit Rating |
Class1@0.1μm Wafer transfer area only |
MTBF |
≥1000hrs |
|
Applicable process |
I line, KrF, ArF, PI, PR, Package |
MTBM |
>six months |
|
Wafer contact material |
ASML, Nikon, CANON, CECT, SMCC |
Wafer breakage rate |
≤0.01% |
|
Cassettes |
FOUP; SMIF |
UP TIME |
≥95% |
|
Application area |
Compound semiconductor, integrated circuit, power device, memory chip, scientific research project, IC, IGBT, MOSFET, MEMS, warping wafer, square wafer, CoWoS |
Software runtime environment |
Windows 10 or later operating system |
|
Minimum line width |
45nm |
Cold and hot plate module |
(LHP; CPL; ADH; HCH; PHP ; HCP)≤42PCS |
Certificate



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